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High throughput accelerator interface framework for a linear time-multiplexed FPGA overlay
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Li, Xiangwei, Vipin, Kizheppatt, Maskell, Douglas L., Fahmy, Suhaib A. and Jain, Abhishek Kumar (2020) High throughput accelerator interface framework for a linear time-multiplexed FPGA overlay. In: IEEE International Symposium on Circuits and Systems, Seville, Spain, 17–20 May 2020. Published in: 2020 IEEE International Symposium on Circuits and Systems (ISCAS) ISBN 9781728133201. doi:10.1109/ISCAS45731.2020.9181072 ISSN 2158-1525.
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Official URL: https://doi.org/10.1109/ISCAS45731.2020.9181072
Abstract
Coarse-grained FPGA overlays improve design productivity through software-like programmability and fast compilation. However, the effectiveness of overlays as accelerators is dependent on suitable interface and programming integration into a typically processor-based computing system, an aspect which has often been neglected in evaluations of overlays. We explore the integration of a time-multiplexed FPGA overlay over a server-class PCI Express interface. We show how this integration can be optimised to maximise performance, and evaluate the area overhead. We also propose a user-friendly programming model for such an overlay accelerator system.
Item Type: | Conference Item (Paper) | ||||||
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Subjects: | Q Science > QA Mathematics > QA76 Electronic computers. Computer science. Computer software T Technology > TK Electrical engineering. Electronics Nuclear engineering |
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Divisions: | Faculty of Science, Engineering and Medicine > Engineering > Engineering | ||||||
Library of Congress Subject Headings (LCSH): | Field programmable gate arrays , Field programmable gate arrays -- Software | ||||||
Journal or Publication Title: | 2020 IEEE International Symposium on Circuits and Systems (ISCAS) | ||||||
Publisher: | IEEE | ||||||
ISBN: | 9781728133201 | ||||||
ISSN: | 2158-1525 | ||||||
Official Date: | 28 September 2020 | ||||||
Dates: |
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DOI: | 10.1109/ISCAS45731.2020.9181072 | ||||||
Status: | Peer Reviewed | ||||||
Publication Status: | Published | ||||||
Reuse Statement (publisher, data, author rights): | © 2020 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. | ||||||
Access rights to Published version: | Restricted or Subscription Access | ||||||
Date of first compliant deposit: | 23 January 2020 | ||||||
Date of first compliant Open Access: | 23 January 2020 | ||||||
RIOXX Funder/Project Grant: |
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Conference Paper Type: | Paper | ||||||
Title of Event: | IEEE International Symposium on Circuits and Systems | ||||||
Type of Event: | Conference | ||||||
Location of Event: | Seville, Spain | ||||||
Date(s) of Event: | 17–20 May 2020 | ||||||
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