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High throughput spatial convolution filters on FPGAs
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Ioannou, Lenos, Al-Dujaili, Abdullah and Fahmy, Suhaib A. (2020) High throughput spatial convolution filters on FPGAs. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 28 (6). pp. 1392-1402. doi:10.1109/TVLSI.2020.2987202 ISSN 1063-8210.
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WRAP-high-throughput-spatial-convolution-filters-FPGAs-Fahmy-2020.pdf - Accepted Version - Requires a PDF viewer. Download (1812Kb) | Preview |
Official URL: http://dx.doi.org/10.1109/TVLSI.2020.2987202
Abstract
Digital signal processing (DSP) on field- programmable gate arrays (FPGAs) has long been appealing because of the inherent parallelism in these computations that can be easily exploited to accelerate such algorithms. FPGAs have evolved significantly to further enhance the mapping of these algorithms, included additional hard blocks, such as the DSP blocks found in modern FPGAs. Although these DSP blocks can offer more efficient mapping of DSP computations, they are primarily designed for 1-D filter structures. We present a study on spatial convolutional filter implementations on FPGAs, optimizing around the structure of the DSP blocks to offer high throughput while maintaining the coefficient flexibility that other published architectures usually sacrifice. We show that it is possible to implement large filters for large 4K resolution image frames at frame rates of 30–60 FPS, while maintaining functional flexibility.
| Item Type: | Journal Article | ||||||
|---|---|---|---|---|---|---|---|
| Subjects: | Q Science > QA Mathematics > QA76 Electronic computers. Computer science. Computer software T Technology > TA Engineering (General). Civil engineering (General) T Technology > TK Electrical engineering. Electronics Nuclear engineering |
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| Divisions: | Faculty of Science, Engineering and Medicine > Engineering > Engineering | ||||||
| Library of Congress Subject Headings (LCSH): | Signal processing -- Digital techniques, Field programmable gate arrays, Image processing, Image processing -- Digital techniques | ||||||
| Journal or Publication Title: | IEEE Transactions on Very Large Scale Integration (VLSI) Systems | ||||||
| Publisher: | IEEE | ||||||
| ISSN: | 1063-8210 | ||||||
| Official Date: | 30 April 2020 | ||||||
| Dates: |
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| Volume: | 28 | ||||||
| Number: | 6 | ||||||
| Page Range: | pp. 1392-1402 | ||||||
| DOI: | 10.1109/TVLSI.2020.2987202 | ||||||
| Status: | Peer Reviewed | ||||||
| Publication Status: | Published | ||||||
| Reuse Statement (publisher, data, author rights): | © 2020 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. | ||||||
| Access rights to Published version: | Restricted or Subscription Access | ||||||
| Date of first compliant deposit: | 6 May 2020 | ||||||
| Date of first compliant Open Access: | 6 May 2020 | ||||||
| RIOXX Funder/Project Grant: |
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