UNSPECIFIED (1999) SiGe heterostructure CMOS circuits and applications. In: Topical Workshop on Heterostructure Microelectronics, AUG 30-SEP 02, 1998, HAYAMA MACHI, JAPAN.

Full text not available from this repository.

Abstract

A review is given of the 300 K electron and hole mobilities in Si/SeGe heterostructures and the potential applications of these materials in CMOS technology. Prospects for further enhancements in carrier mobility and CMOS process design options are discussed for Si/SiGe strained layers on Si and on relaxed SiGe 'virtual substrates'. Recent work on heterointerface quality, limited area growth of virtual substrates, carrier mobility and velocity-field characteristics is also reported. (C) 1999 Elsevier Science Ltd. All rights reserved.

Item Type:	Conference Item (UNSPECIFIED)
Subjects:	T Technology > TK Electrical engineering. Electronics Nuclear engineering Q Science > QC Physics
Journal or Publication Title:	SOLID-STATE ELECTRONICS
Publisher:	PERGAMON-ELSEVIER SCIENCE LTD
ISSN:	0038-1101
Date:	August 1999
Volume:	43
Number:	8
Number of Pages:	10
Page Range:	pp. 1497-1506
Publication Status:	Published
Title of Event:	Topical Workshop on Heterostructure Microelectronics
Location of Event:	HAYAMA MACHI, JAPAN
Date(s) of Event:	AUG 30-SEP 02, 1998
URI:	http://wrap.warwick.ac.uk/id/eprint/14145

Data sourced from Thomson Reuters' Web of Knowledge

Request changes to a record

Actions (login required)

View Item