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UIS performance and ruggedness of stand-alone and cascode SiC JFETs

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Agbo, S. N., Ortiz Gonzalez, Jose Angel, Wu, R., Jahdi, S. and Alatise, Olayiwola M. (2020) UIS performance and ruggedness of stand-alone and cascode SiC JFETs. Microelectronics Reliability . 113803. doi:10.1016/j.microrel.2020.113803 (In Press)

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Official URL: http://dx.doi.org/10.1016/j.microrel.2020.113803

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Abstract

In this paper the ruggedness of stand-alone and cascode SiC JFETs is evaluated under single and repetitive unclamped inductive switching (UIS). The impact of the JFET gate resistance, avalanche current and temperature are evaluated. The results show that the avalanche characteristics are strongly affected by the peak avalanche current and the JFET gate resistance. Due to the absence of an insulating gate, there is significant JFET gate current during avalanche. This gate leakage current plays a fundamental role on the reduced performance under repetitive UIS of SiC cascode JFETs compared with stand-alone SiC JFETs.

Item Type: Journal Article
Subjects: T Technology > TK Electrical engineering. Electronics Nuclear engineering
T Technology > TP Chemical technology
Divisions: Faculty of Science > Engineering
Library of Congress Subject Headings (LCSH): Silicon carbide , Field-effect transistors, Microelectronics , Industrial electronics
Journal or Publication Title: Microelectronics Reliability
Publisher: Pergamon-Elsevier Science Ltd.
ISSN: 0026-2714
Official Date: 1 November 2020
Dates:
DateEvent
1 November 2020Available
14 July 2020Accepted
Date of first compliant deposit: 5 November 2020
Article Number: 113803
DOI: 10.1016/j.microrel.2020.113803
Status: Peer Reviewed
Publication Status: In Press
Access rights to Published version: Restricted or Subscription Access
RIOXX Funder/Project Grant:
Project/Grant IDRIOXX Funder NameFunder ID
EP/R004366/1[EPSRC] Engineering and Physical Sciences Research Councilhttp://dx.doi.org/10.13039/501100000266

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