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FPGA acceleration of structured-mesh-based explicit and implicit numerical solvers using SYCL
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Kamalakkannan, K., Mudalige, Gihan R., Reguly, I. Z. and Fahmy, S. A. (2022) FPGA acceleration of structured-mesh-based explicit and implicit numerical solvers using SYCL. In: IWOCL and SYCLcon, Virtual, 10–12 May 2022. Published in: IWOCL'22: International Workshop on OpenCL ISBN 9781450396585. doi:10.1145/3529538.3530007
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Official URL: https://doi.org/10.1145/3529538.3530007
Abstract
We explore the design and development of structured-mesh based solvers on current Intel FPGA hardware using the SYCL programming model. Two classes of applications are targeted : (1) stencil applications based on explicit numerical methods and (2) multidimensional tridiagonal solvers based on implicit methods. Both classes of solvers appear as core modules in a wide-range of realworld applications ranging from CFD to financial computing. A general, unified workflow is formulated for synthesizing them on Intel FPGAs together with predictive analytic models to explore the design space to obtain near-optimal performance. Performance of synthesized designs, using the above techniques, for two non-trivial applications on an Intel PAC D5005 FPGA card is benchmarked. Results are compared to performance of optimized parallel implementations of the same applications on a Nvidia V100 GPU. Observed runtime results indicate the FPGA providing better or matching performance to the V100 GPU. However, more importantly the FPGA solutions provide 59%-76% less energy consumption for their largest configurations, making them highly attractive for solving workloads based on these applications in production settings. The performance model predicts the runtime of designs with high accuracy with less than 5% error for all cases tested, demonstrating their significant utility for design space explorations. With these tools and techniques, we discuss determinants for a given structuredmesh code to be amenable to FPGA implementation, providing insights into the feasibility and profitability of a design, how they can be codified using SYCL and the resulting performance.
Item Type: | Conference Item (Paper) | ||||||
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Subjects: | Q Science > QA Mathematics > QA76 Electronic computers. Computer science. Computer software T Technology > TK Electrical engineering. Electronics Nuclear engineering |
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Divisions: | Faculty of Science, Engineering and Medicine > Science > Computer Science | ||||||
Library of Congress Subject Headings (LCSH): | Field programmable gate arrays, High performance computing, Programming languages (Electronic computers), Parallel processing (Electronic computers) | ||||||
Series Name: | IWOCL'22 | ||||||
Journal or Publication Title: | IWOCL'22: International Workshop on OpenCL | ||||||
Publisher: | ACM | ||||||
ISBN: | 9781450396585 | ||||||
Official Date: | 10 May 2022 | ||||||
Dates: |
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Article Number: | 19 | ||||||
DOI: | 10.1145/3529538.3530007 | ||||||
Status: | Peer Reviewed | ||||||
Publication Status: | Published | ||||||
Re-use Statement: | © 2022 Association for Computing Machinery. This is the author's version of the work. It is posted here for your personal use. Not for redistribution. The definitive Version of Record was published in K. Kamalakkannan, G.R. Mudalige, I.Z. Reguly, and S.A. Fahmy. 2022. FPGA Acceleration of Structured-Mesh-Based Explicit and Implicit Numerical Solvers using SYCL. In IWOCL and SYCLcon, May 12–12, 2022, Virtual. ACM, http://dx.doi.org/10.1145/{number}. | ||||||
Access rights to Published version: | Restricted or Subscription Access | ||||||
Date of first compliant deposit: | 4 April 2022 | ||||||
Date of first compliant Open Access: | 4 April 2022 | ||||||
RIOXX Funder/Project Grant: |
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Conference Paper Type: | Paper | ||||||
Title of Event: | IWOCL and SYCLcon | ||||||
Type of Event: | Conference | ||||||
Location of Event: | Virtual | ||||||
Date(s) of Event: | 10–12 May 2022 | ||||||
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