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High voltage 3-dimesional partial SOI technology platform for power integrated circuits
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Antoniou, Marina, Udrea, Florin, Kho Ching Tee, Elizabeth and Hölke, Alex (2022) High voltage 3-dimesional partial SOI technology platform for power integrated circuits. IEEE Transactions on Electron Devices, 69 (6). doi:10.1109/TED.2022.3166465 ISSN 0018-9383.
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Official URL: https://doi.org/10.1109/TED.2022.3166465
Abstract
Partial SOI (PSOI) is a widely recognized technology suitable for High Voltage (HV) architectures for Power Integrated Circuits (PICs). Despite the added process complexity compared to SOI RESURF, this technology offers a wider range of voltage ratings due to the action of the depletion layer in the Handle Wafer (HW), reduced parasitic capacitances due to the extra volume of the depletion region in the HW and better heat conduction due to thinner buried oxide layer. The newly developed platform technology, featuring 3-dimensional designs to fully utilize the PSOI potential, is particularly relevant to the manufacturing of high voltage integrated circuits (HVICs) where low on-state resistance and reduced selfheating are essential requirements. This work presents a PSOI technology platform with voltage ratings ranging from 45 to 400V while providing low on-state resistance, good hot carrier injection stability as well as Electrostatic Discharge (ESD) capability of the HV devices. For example, for a 375V rated LDMOSFET, this technology achieves an on-state resistance of 1435mΩ.mm2 , an over 50% improvement compared to the state-of-the-art SOI technologies while maintaining competitive reliability.
Item Type: | Journal Article | ||||||
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Subjects: | T Technology > TK Electrical engineering. Electronics Nuclear engineering | ||||||
Divisions: | Faculty of Science, Engineering and Medicine > Engineering > Engineering | ||||||
Library of Congress Subject Headings (LCSH): | Metal oxide semiconductor field-effect transistors, High voltages, Integrated circuits | ||||||
Journal or Publication Title: | IEEE Transactions on Electron Devices | ||||||
Publisher: | IEEE | ||||||
ISSN: | 0018-9383 | ||||||
Official Date: | June 2022 | ||||||
Dates: |
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Volume: | 69 | ||||||
Number: | 6 | ||||||
DOI: | 10.1109/TED.2022.3166465 | ||||||
Status: | Peer Reviewed | ||||||
Publication Status: | Published | ||||||
Reuse Statement (publisher, data, author rights): | © 2022 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. | ||||||
Access rights to Published version: | Restricted or Subscription Access | ||||||
Date of first compliant deposit: | 7 April 2022 | ||||||
Date of first compliant Open Access: | 8 April 2022 | ||||||
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