UNSPECIFIED (1993) IMPROVED DESIGN OF DIGITAL-FILTERS SATISFYING A COMBINED LOSS AND DELAY SPECIFICATION. IEE PROCEEDINGS-G CIRCUITS DEVICES AND SYSTEMS, 140 (3). pp. 223-229. ISSN 0956-3768

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Abstract

The classical solution to the design of both analogue and digital filters with magnitude and delay constraints is to cascade a minimum phase circuit satisfying the magnitude constraint and an allpass circuit that equalises the delay distortion caused by the first. Such a solution is inefficient and, in this paper, a simple method is considered whose aim is to meet both constraints simultaneously in the digital case. The filter model that is used is a parallel arrangement of allpass circuits which allows a large range of transfer functions to be realised. This model is efficient in the sense that the number of multipliers required equals to the filter order. A sequential quadratic programming technique coupled with a single-line template is used to find the set of coefficients which minimises the squared error. A novel way of setting up the frequency grid is proposed which aims to increase the loss quickly in the transition band. The choice of suitable starting points has an important impact on the length of the optimisation process. A particularly efficacious choice is presented here. Examples are provided illustrating the method, including lowpass, bandpass and multiple bandpass designs, as well as comparing it with a recently reported technique.

Item Type:	Journal Article
Subjects:	T Technology > TK Electrical engineering. Electronics Nuclear engineering
Journal or Publication Title:	IEE PROCEEDINGS-G CIRCUITS DEVICES AND SYSTEMS
Publisher:	IEE-INST ELEC ENG
ISSN:	0956-3768
Date:	June 1993
Volume:	140
Number:	3
Number of Pages:	7
Page Range:	pp. 223-229
Publication Status:	Published
URI:	http://wrap.warwick.ac.uk/id/eprint/21208

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