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Fabrication and characterisation of novel Ge MOSFETs
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Beer, Chris, 1982- (2007) Fabrication and characterisation of novel Ge MOSFETs. PhD thesis, University of Warwick.
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Official URL: http://webcat.warwick.ac.uk/record=b2244186~S15
Abstract
As high-k dielectrics are introduced into commercial Si CMOS (Complimentary Metal Oxide Semiconductor) microelectronics, the 40 year channel/dielectric partnership of Si/SiO2 is ended and the door opened for silicon to be replaced as the active channel material in MOSFETs (Metal Oxide Semiconductor Field Effect Transistor). Germanium is a good candidate as it has higher bulk carrier mobilities than silicon. In addition, Si and Ge form a thermodynamically stable SiGe alloy of any composition, allowing Ge to be implemented as a thin layer on the surface of a standard Si substrate. This thesis is a practical investigation on several aspects of Ge CMOS technology. High-k dielectric Ge p-MOSFETs are electrically characterised. A large variation in interface state densities is demonstrated to be responsible for a threshold voltage shift and this is proportional to reciprocal peak mobility due to the Coulomb scattering of carriers by charged states. A theoretical mobility is fitted to that measured at 4.2 K and confirms that interface states are the main source of interface charged impurities. The model demonstrates a reduction in the interface charged impurity density in p-MOSFETs that underwent a PMA (Post Metallisation Anneal) in hydrogen atmosphere and that the anneal also reduces the RMS (Root Mean Square) dielectric/semiconductor interface roughness, from an average of 0.60 nm to 0.48 nm. High-k strained Ge p-MOSFETs are electrically characterised and have peak mobilities at 300 K (470 cm2 V-1 s-1) and 4.2 K (1780 cm2 V-1 s-1) far in excess of those measured for the unstrained Ge p-MOSFETs (285 cm2 V-1 s-1,785 cm2 V-1 s-1 respectively). Strained Ge n-MOSFETs perform significantly worse than standard Si P, - MOSFETs primarily due to a high source/drain resistance. A 10 nm thick SiGe-01 (On Insulator) layer with a Ge composition of 58% is obtained from a 55 nm Si0_88Ge1o2. initial layer on 100 nm Si-Ol substrate via the germanium condensation technique. For the first time, germanium is demonstrated to diffuse through the BOX (Buried OXide) during Ge-condensation and into the underlying Si substrate. An order of magnitude increase in the calculated ITOX (Internal Thermal OXidation) rate of the BOX in the final stages of Ge-condensation is hypothesised to be responsible for stopping this diffusion.
| Item Type: | Thesis or Dissertation (PhD) |
|---|---|
| Alternative Title: | Fabrication and characterisation of novel Germanium metal oxide semiconductor field effect transistors |
| Subjects: | T Technology > TK Electrical engineering. Electronics Nuclear engineering Q Science > QC Physics |
| Library of Congress Subject Headings (LCSH): | Germanium compounds, Semiconductors -- Research, Dielectrics -- Research, Metallic oxides -- Research |
| Date: | November 2007 |
| Institution: | University of Warwick |
| Theses Department: | Department of Physics |
| Thesis Type: | PhD |
| Publication Status: | Unpublished |
| Supervisor(s)/Advisor: | Parker, Evan H. C. ; Whall, Terry E. |
| Format of File: | |
| Extent: | 214 leaves: ill., charts |
| Language: | eng |
| URI: | http://wrap.warwick.ac.uk/id/eprint/2411 |
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