Olsen, S. H., Yana, L., Agaiby, R., Escobedo-Cousin, E., O'Neill, A. G., Hellström, P.-E., Östling, Mikael, Lyutovich, K., Kasper, E., Claeys, C. and Parker, Evan H. C. (2009) Strained Si/SiGe MOS technology: improving gate dielectric integrity. In: 4th IEEE International Symposium on Advanced Gate Stack Technology (ISAGST), Dallas, TX, 2007. Published in: Microelectronic Engineering, Vol.86 (No.3). pp. 218-223. doi:10.1016/j.mee.2008.08.001 ISSN 0167-9317.

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Abstract

Strained Si is recognised as a necessary technology booster for the nanoelectronics regime. This work shows that high levels of stress attainable from globally strained Si/SiGe platforms can benefit gate leakage and reliability in addition to MOSFET channel mobility. Device self-heating due to the low thermal conductivity of SiGe is shown to be the dominating factor behind compromised performance against short channel strained Si/SiGe MOSFETs. Novel thin virtual substrates aimed at reducing self-heating effects are investigated. In addition to reducing self-heating effects, the thin Virtual substrates provide further improvements to gate oxide integrity, reliability and lifetime compared with conventional thick virtual substrates. This is attributed to tire lower surface roughness of the thin virtual substrates which arises due to the reduced interactions of strain-relieving misfit dislocations during thin Virtual substrate growth. Good agreement between experimental data and physical models is demonstrated, enabling gate leakage mechanisms to be identified. The advantages and challenges of using globally strained Si/SiGe to advance MOS technology are discussed. (C) 2008 Elsevier B.V. All rights reserved.

Item Type:	Conference Item (Paper)
Subjects:	T Technology > TK Electrical engineering. Electronics Nuclear engineering T Technology Q Science > QC Physics
Divisions:	Faculty of Science, Engineering and Medicine > Science > Physics
Journal or Publication Title:	Microelectronic Engineering
Publisher:	Elsevier BV
ISSN:	0167-9317
Official Date:	March 2009
Dates:	Date Event March 2009 Published
Volume:	Vol.86
Number:	No.3
Number of Pages:	6
Page Range:	pp. 218-223
DOI:	10.1016/j.mee.2008.08.001
Status:	Peer Reviewed
Publication Status:	Published
Access rights to Published version:	Restricted or Subscription Access
Conference Paper Type:	Paper
Title of Event:	4th IEEE International Symposium on Advanced Gate Stack Technology (ISAGST)
Type of Event:	Conference
Location of Event:	Dallas, TX
Date(s) of Event:	2007

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