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The use of condition maps in the design and testing of power electronic circuits and devices
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Bryant, Angus T., Parker-Allotey, Nii-Adotei and Palmer, Patrick R. (2007) The use of condition maps in the design and testing of power electronic circuits and devices. IEEE Transactions on Industry Applications, Vol.43 (No.4). pp. 902-910. doi:10.1109/TIA.2007.900470 ISSN 0093-9994.
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Official URL: http://dx.doi.org/10.1109/TIA.2007.900470
Abstract
This paper presents a new technique for analyzing the conditions to which power semiconductor devices are subjected within practical inverters. A representative load cycle, which defines the inverter conditions, is used to estimate the switching conditions of the devices. Condition maps are generated, which allows the design and testing of the system to consider the more likely range of conditions. Estimates of temperature profiles can also be made to further improve the realism of such design. This promises to lead to the development of more realistic optimization procedures.
Item Type: | Journal Article | ||||
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Subjects: | T Technology > TA Engineering (General). Civil engineering (General) T Technology > TK Electrical engineering. Electronics Nuclear engineering |
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Divisions: | Faculty of Science, Engineering and Medicine > Engineering > Engineering | ||||
Journal or Publication Title: | IEEE Transactions on Industry Applications | ||||
Publisher: | IEEE | ||||
ISSN: | 0093-9994 | ||||
Official Date: | July 2007 | ||||
Dates: |
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Volume: | Vol.43 | ||||
Number: | No.4 | ||||
Number of Pages: | 9 | ||||
Page Range: | pp. 902-910 | ||||
DOI: | 10.1109/TIA.2007.900470 | ||||
Status: | Peer Reviewed | ||||
Publication Status: | Published | ||||
Access rights to Published version: | Restricted or Subscription Access | ||||
Title of Event: | 39th Annual Meeting of the IEEE-Industry-Applications-Society | ||||
Type of Event: | Other | ||||
Location of Event: | Seattle, WA | ||||
Date(s) of Event: | October 03-07, 2004 |
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