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Low-frequency noise characterization of strained germanium pMOSFETs

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Simoen, E. (Eddy), Mitard, J., De Jaeger, B., Eneman, G., Dobbie, A. (Andrew), Myronov, Maksym, Whall, Terry E., Leadley, D. R. (David R.), Meuris, M., Hoffmann, T. and Claeys, C.. (2011) Low-frequency noise characterization of strained germanium pMOSFETs. IEEE Transactions on Electron Devices, Vol.58 (No.9). pp. 3132-3139. ISSN 0018-9383

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Official URL: http://dx.doi.org/10.1109/TED.2011.2160679

Abstract

Low-frequency noise in strained Ge epitaxial layers, which are grown on a reverse-graded relaxed SiGe buffer layer, has been evaluated for different front-end processing conditions. It has been shown that the 1/f noise in strong inversion is governed by trapping in the gate oxide (number fluctuations) and not affected by the presence of compressive strain in the channel. However, some impact has been found from the type of halo implantation used, whereby the lowest noise spectral density and the highest hole mobility are obtained by replacing the standard As halo by P implantation. At the same time, omitting the junction anneal results in poor device characteristics, which can be understood by considering the presence of a high density of nonannealed implantation damage in the channel and the gate stack near the source and the drain.

Item Type:

Journal Article

Subjects:

Q Science > QC Physics

Divisions:

Faculty of Science > Physics

Library of Congress Subject Headings (LCSH):

Germanium, Metal oxide semiconductor field-effect transistors

Journal or Publication Title:

IEEE Transactions on Electron Devices

Publisher:

I E E E

ISSN:

0018-9383

Official Date:

September 2011

Dates:

Date	Event
September 2011	Published

Volume:

Vol.58

Number:

No.9

Page Range:

pp. 3132-3139

Identification Number:

10.1109/TED.2011.2160679

Status:

Peer Reviewed

Publication Status:

Published

Access rights to Published version:

Restricted or Subscription Access

Funder:

Engineering and Physical Sciences Research Council (EPSRC), Seventh Framework Programme (European Commission) (FP7)

Grant number:

EP/F031408/1 (EPSRC), 216171 (FP7)

References:

[1] C. Claeys, E. Simoen, J. Mitard, G. Eneman, M. Meuris, and E. Simoen, “Si versus Ge for future microelectronics,” Thin Solid Films, vol. 518, pp. 2301-2306, 2010.
[2] C. Claeys and E. Simoen, Eds., “Germanium—based technologies: From Materials to Devices”, Elsevier, 2007.
[3] M. L. Lee, E. A. Fitzgerald, M. T. Bulsara, M. T. Currie, and A. Lochtefeld, “Strained Si, SiGe, and Ge channels for high-mobility metal-oxide-semiconductor field-effect transistors,” J. Appl. Phys., vol. 97, no. 1, pp. 011101-1/27, Jan. 2005.
[4] V. Terzieva, L. Souriau, M. Caymax, D. P. Brunco, A. Moussa, S. Van Elshocht, R. Loo, F. Clemente, A. Satta, and M. Meuris, “Benefits and side effects of high temperature anneal used to reduce threading dislocation defects in epitaxial Ge layers on Si substrates,” Thin Solid Films, vol. 517, no. 1, pp. 172-177, Nov. 2008.
[5] E. Simoen, G. Eneman, G. Wang, L. Souriau, R. Loo, M. Caymax, and C. Claeys, “Extended-defect aspects of Ge-on-Si materials and devices,” J. Electrochem. Soc., vol. 157, no. 1, pp. R1-R5, Jan. 2010.
[6] E. Simoen, G. Brouwers, G. Eneman, M. Gonzalez Bargallo, F.E. Leys, B. De Jaeger, J. Mitard, D.P. Brunco, L. Souriau, N. Cody, S.G. Thomas, L. Lajaunie, M.-L. David, and M. Meuris, “Is there an impact of the threading dislocations on the characteristics of devices fabricated in strained-Ge substrates?,” Phys. Stat. Sol. (c), vol. 6, pp. 1912-1917, 2009.
[7] W.-C. Hua, M. H. Lee, P. S. Chen, M.-J. Tsai, and C. W. Liu, “Threading dislocation induced low frequency noise in strained-Si nMOSFETs,” IEEE Electron Device Lett., vol. 26, no. 9, pp. 667-669, Sep. 2005.
[8] E. Simoen, G. Eneman, P. Verheyen, R. Loo, K. De Meyer, and C. Claeys, “Processing aspects in the low-frequency noise of nMOSFETs on strained-silicon substrates,” IEEE Trans. Electron Devices, vol. 53, no. 5, pp. 1039-1047, May 2006.
[9] B.G. Malm, M. von Haartman, and M. Östling, “Influence of dislocations on low frequency noise in nMOSFETs fabricated on tensile strained virtual substrates,“ in Proc. of the 19th Int. Conf. on Noise and Fluctuations - ICNF, Tokyo, Japan, Eds M. Tacano, Y. Yamamoto, and M. Nakao, The American Institute of Physics, Proc. Vol. CP922, p. 133, 2007.
[10] E. Simoen, A. Firrincieli, F. Leys, R. Loo, B. De Jaeger, J. Mitard, and C. Claeys, “Low-frequency noise assessment of the silicon passivation of Ge pMOSFETs,“ Thin Solid Films, vol. 518, pp. 2493-2496, 2010.
[11] E. Simoen, J. Mitard, B. De Jaeger, G. Eneman, A. Dobbie, M. Myronov, D.R. Leadley, M. Meuris, T. Hoffmann, and C. Claeys, “Defect-related excess low-frequency noise in Ge-on-Si pMOSFETs,” IEEE Electron Device Lett., vol. 32, no 1, pp. 87-89, Jan. 2011.
[12] V. A. Shah, A. Dobbie, M. Myronov, and D. R. Leadley, “Reverse graded SiGe/Ge/Si buffers for high-composition virtual substrates,“ J. Appl. Phys., vol. 107, pp. 064304-1/11, Mar. 2010.
[13] J. Mitard, B. De Jaeger, G. Eneman, A. Dobbie, M. Myronov, M. Kobayashi, J. Geypen, H. Bender, B. Vincent, R. Krom, J. Franco, G. Winderickx, E. Vrancken, W. Vanherle, W.-E. Wang, J. Tseng, R. Loo, K. De Meyer, M. Caymax, L. Pantisano, D.R. Leadley, M. Meuris, P.P. Absil, S. Biesemans, and T. Hoffmann, “High hole mobility 65nm biaxially-strained Ge-pFETs: Fabrication, analysis and optimization,“ to be published in the Proc. of SSDM 2010, Jpn. J. Appl. Phys., April 2011.
[14] E. Simoen, A. Firrincieli, F. Leys, R. Loo, B. De Jaeger, J. Mitard and C. Claeys, “Length-dependent transition of the dominant 1/f noise mechanism in Si-passivated Ge-on-Si pMOSFETs,” In: the Proc. of the 20th Int. Conf. Noise and Fluctuations - ICNF, Pisa, Italy, Eds. M. Macucci and G. Basso, The American Inst. of Physics, Proc. vol. CP1129, pp. 281-284, 2009.
[15] G. Ghibaudo, O. Roux, C. Nguyen-Duc, F. Balestra, and J. Brini, “Improved analysis of low frequency noise in field-effect MOS transistors,“ Phys. Stat. Sol. A, vol. 124, no. 2, pp. 571-578, Apr. 1991.
[16] W. Guo, G. Nicholas, B. Kaczer, R.M. Todi, B. De Jaeger, C. Claeys, A. Mercha, E. Simoen, B. Cretu, J.-M. Routoure, and R. Carin, “Low-frequency noise assessment of silicon passivated Ge pMOSFETs with TiN/TaN/HfO2 gate stack,“ IEEE Electron Device Lett., vol. 28, no. 4, pp. 288-291, Apr. 2007.
[17] D. Maji, F. Crupi, G. Giusi, C. Pace, E. Simoen, C. Claeys, and V. Ramgopal Rao, “On the dc and noise properties of the gate current in epitaxial Ge p-channel metal oxide semiconductor field effect transistors with TiN/TaN/HfO2/SiO2 gate stack,“ Appl. Phys. Lett., 92, no. 16, pp. 163508-1/3, Apr. 2008.
[18] J. Gyani, M. Valenza, S. Soliveres, F. Martinez, C. Le Royer, E. Augendre, K. Romanjek, and C. Drazek, “Investigation of 1/f noise in germanium-on-insulator 0.12 m PMOS transistors from weak to strong inversion,“ Solid-St. Electron., vol. 53, no. 12, pp. 1268-1272, Dec. 2009.
[19] G. Ghibaudo, “New method for the extraction of MOSFET parameters,“ Electron. Lett., vol. 24, no. 9, pp. 543-545, Apr. 1988.
[20] C. Claeys, E. Simoen, S. Put, G. Giusi, and F. Crupi, “Impact strain engineering on gate stack quality and reliability,” Solid-St. Electron., vol. 52, pp. 1115-1126, 2008.
[21] J.-S. Lim, A. Acosta, S.E. Thompson, G. Bosman, E. Simoen, and T. Nishida, “Effect of mechanical strain on 1/f noise in metal oxide semiconductor field effect transistors,” J. Appl. Phys., vol. 105, no. 5, p. 054504-1/11, 2009.
[22] E. Simoen, G. Eneman, P. Verheyen, R. Delhougne, R. Loo, K. De Meyer, and C. Claeys, “On the beneficial impact of tensile-strained silicon substrates on the low-frequency noise of n-channel metal-oxide-semiconductor devices,” Appl. Phys. Lett., vol. 86, no. 22, p. 223509-1, 2005.