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Towards automated memory model generation via event tracing
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Perks, O. F. J., Beckingsale, David A., Hammond, Simon D., Miller, I. (Ian), Herdman, J. A., Vadgama, A., Bhalerao, Abhir, He, Ligang and Jarvis, Stephen A., 1970-. (2013) Towards automated memory model generation via event tracing. Computer Journal, Volume 56 (Number 2). pp. 156-174. ISSN 0010-4620
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Official URL: http://dx.doi.org/10.1093/comjnl/bxs051
Abstract
The importance of memory performance and capacity is a growing concern for high performance computing laboratories around the world. It has long been recognized that improvements in processor speed exceed the rate of improvement in dynamic random access memory speed and, as a result, memory access times can be the limiting factor in high performance scientific codes. The use of multi-core processors exacerbates this problem with the rapid growth in the number of cores not being matched by similar improvements in memory capacity, increasing the likelihood of memory contention. In this paper, we present WMTools, a lightweight memory tracing tool and analysis framework for parallel codes, which is able to identify peak memory usage and also analyse per-function memory use over time. An evaluation of WMTools, in terms of its effectiveness and also its overheads, is performed using nine established scientific applications/benchmark codes representing a variety of programming languages and scientific domains. We also show how WMTools can be used to automatically generate a parameterized memory model for one of these applications, a two-dimensional non-linear magnetohydrodynamics application, Lare2D. Through the memory model we are able to identify an unexpected growth term which becomes dominant at scale. With a refined model we are able to predict memory consumption with under 7% error.
| Item Type: | Journal Article |
|---|---|
| Subjects: | Q Science > QA Mathematics > QA76 Electronic computers. Computer science. Computer software |
| Divisions: | Faculty of Science > Computer Science |
| Library of Congress Subject Headings (LCSH): | High performance computing, Computer storage devices, Multiprocessors |
| Journal or Publication Title: | Computer Journal |
| Publisher: | Oxford University Press |
| ISSN: | 0010-4620 |
| Date: | 2013 |
| Volume: | Volume 56 |
| Number: | Number 2 |
| Page Range: | pp. 156-174 |
| Identification Number: | 10.1093/comjnl/bxs051 |
| Status: | Peer Reviewed |
| Publication Status: | Published |
| Access rights to Published version: | Restricted or Subscription Access |
| Description: | This article appears in: Special Focus on Performance Engineering |
| Funder: | Royal Society (Great Britain), Atomic Weapons Establishment (Great Britain) (AWE), Knowledge Transfer Partnerships (KTP), Engineering and Physical Sciences Research Council (EPSRC), United States. Department of Energy |
| Grant number: | IF090020/AM (RS), KTP006740 (KTP), CDK0660, CDK0724 (AWE), EP/I029117/1 (EPSRC), DE-AC04- 94AL85000 (DoE) |
| URI: | http://wrap.warwick.ac.uk/id/eprint/45579 |
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