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WMTrace : a lightweight memory allocation tracker and analysis framework

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Perks, O. F. J., Hammond, Simon D., Pennycook, Simon J. and Jarvis, Stephen A., 1970- (2011) WMTrace : a lightweight memory allocation tracker and analysis framework. In: UK Performance Engineering Workshop (UKPEW'11), Bradford, United Kingdom, 7-8 July 2011 (Unpublished)

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Official URL: http://www.inf.brad.ac.uk/ukpew11/index.php

Abstract

The diverging gap between processor and memory performance has been a well discussed aspect of computer architecture literature for some years. The use of multi-core processor designs has, however, brought new problems to the design of memory architectures - increased core density without matched improvement in memory capacity is reduc- ing the available memory per parallel process. Multiple cores accessing memory simultaneously degrades performance as a result of resource con- tention for memory channels and physical DIMMs. These issues combine to ensure that memory remains an on-going challenge in the design of parallel algorithms which scale. In this paper we present WMTrace, a lightweight tool to trace and analyse memory allocation events in parallel applications. This tool is able to dynamically link to pre-existing application binaries requiring no source code modification or recompilation. A post-execution analysis stage enables in-depth analysis of traces to be performed allowing memory allocations to be analysed by time, size or function. The second half of this paper features a case study in which we apply WMTrace to five parallel scientific applications and benchmarks, demonstrating its effectiveness at recording high-water mark memory consumption as well as memory use per-function over time. An in-depth analysis is provided for an unstructured mesh benchmark which reveals significant memory allocation imbalance across its participating processes.

Item Type:

Conference Item (Paper)

Subjects:

Q Science > QA Mathematics > QA76 Electronic computers. Computer science. Computer software

Divisions:

Faculty of Science > Computer Science

Library of Congress Subject Headings (LCSH):

Memory management (Computer science), Multiprocessors, Parallel processing (Electronic computers)

Official Date:

July 2011

Dates:

Date	Date Type
July 2011	Available

Status:

Peer Reviewed

Publication Status:

Unpublished

Funder:

Science Research Investment Fund (SRIF)

Conference Paper Type:

Paper

Title of Event:

UK Performance Engineering Workshop (UKPEW'11)

Type of Event:

Workshop

Location of Event:

Bradford, United Kingdom

Date(s) of Event:

7-8 July 2011

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