WARPP : a toolkit for simulating high performance parallel scientific codes
Hammond, Simon D., Mudalige, Gihan R., Smith, J. A., Jarvis, Stephen A., 1970-, Herdman, J. A. and Vadgama, A. (2009) WARPP : a toolkit for simulating high performance parallel scientific codes. In: 2nd International Conference on Simulation Tools and Techniques (SIMUTools09), Rome, Italy, 2-6 Mar 2009. Published in: SIMUTools '09 2nd International Conference on Simulation Tools and Techniques Article no. 19.
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Official URL: http://dx.doi.org/10.4108/ICST.SIMUTOOLS2009.5753
There are a number of challenges facing the High Performance Computing (HPC) community, including increasing levels of concurrency (threads, cores, nodes), deeper and more complex memory hierarchies (register, cache, disk, network), mixed hardware sets (CPUs and GPUs) and increasing scale (tens or hundreds of thousands of processing elements). Assessing the performance of complex scientific applications on specialised high-performance computing architectures is difficult. In many cases, traditional computer benchmarking is insufficient as it typically requires access to physical machines of equivalent (or similar) specification and rarely relates to the potential capability of an application. A technique known as application performance modelling addresses many of these additional requirements. Modelling allows future architectures and/or applications to be explored in a mathematical or simulated setting, thus
enabling hypothetical questions relating to the configuration of a potential future architecture to be assessed in terms of its impact on key scientific codes.
This paper describes the Warwick Performance Prediction (WARPP) simulator, which is used to construct application performance models for complex industry-strength parallel scientific codes executing on thousands of processing cores. The capability and accuracy of the simulator is demonstrated through its application to a scientific benchmark developed by the United Kingdom Atomic Weapons Establishment (AWE). The results of the simulations are validated for two different HPC architectures, each case demonstrating a greater than 90% accuracy for run-time prediction. Simulation results, collected from runs on a standard PC, are provided for up to 65,000 processor cores. It is also shown how the addition of operating system jitter to the simulator can improve the quality of the application performance model results.
|Item Type:||Conference Item (Paper)|
|Subjects:||Q Science > QA Mathematics > QA76 Electronic computers. Computer science. Computer software|
|Divisions:||Faculty of Science > Computer Science|
|Journal or Publication Title:||SIMUTools '09 2nd International Conference on Simulation Tools and Techniques|
|Publisher:||ICST (Institute for Computer Sciences, Social-Informatics and Telecommunications Engineering)|
|Official Date:||March 2009|
|Page Range:||Article no. 19|
|Conference Paper Type:||Paper|
|Title of Event:||2nd International Conference on Simulation Tools and Techniques (SIMUTools09)|
|Type of Event:||Conference|
|Location of Event:||Rome, Italy|
|Date(s) of Event:||2-6 Mar 2009|
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