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Improved circuits and formulae for multiple addition, multiplication and symmetric Boolean functions

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Paterson, Michael S. and Zwick, Uri (1990) Improved circuits and formulae for multiple addition, multiplication and symmetric Boolean functions. University of Warwick. Department of Computer Science. (Department of Computer Science research report). (Unpublished)

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Abstract

Circuits and formulae over several bases, with improved depth and size respectively, are given for the carry save addition of n binary numbers (i.e., obtaining two numbers whose sum is equal to the sum of the n numbers). As a consequence improved circuits and formulae for multiple addition, multiplication and for most symmetric Boolean functions are obtained.

Item Type: Report
Subjects: Q Science > QA Mathematics > QA76 Electronic computers. Computer science. Computer software
Divisions: Faculty of Science > Computer Science
Library of Congress Subject Headings (LCSH): Computer arithmetic and logic units
Series Name: Department of Computer Science research report
Publisher: University of Warwick. Department of Computer Science
Official Date: March 1990
Dates:
DateEvent
March 1990Completion
Number: Number 155
Number of Pages: 21
DOI: CS-RR-155
Institution: University of Warwick
Theses Department: Department of Computer Science
Status: Not Peer Reviewed
Publication Status: Unpublished
Publisher Statement: M.S.&nbsp;Paterson, N.&nbsp;Pippenger and U.&nbsp;Zwick, &ldquo;Improved Circuits and Formulae for Multiple Addition, Multiplication and Symmetric Boolean Functions&rdquo;, <i>Boolean Function Complexity</i>, LMS Lecture Note Series 169, Cambridge University Press, Cambridge, UK, pp.&nbsp;174-201 (1992)
Funder: Science and Engineering Research Council (Great Britain) (SERC), European Strategic Programme of Research and Development in Information Technology (ESPRIT), Universiáš­at Tel-Aviv
Grant number: 3075 (ESPRIT)
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