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Characterisation based bottleneck analysis of parallel systems

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Zemerly, M. J., Papay, J. and Nudd, G. R. (1995) Characterisation based bottleneck analysis of parallel systems. University of Warwick. Department of Computer Science. (Department of Computer Science research report). (Unpublished)

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Abstract

Bottleneck analysis plays an important role in the early design of parallel computers and programs. In this paper a methodology for bottleneck analysis based on an instruction level characterisation technique is presented. The methodology is based on the assumption that a bottleneck is cauused by the slowest component of a computing system. These components are: memory (internal, external), processor (ALU, FPU), communication and I/O. Three metrics were used to identify bottlenecks in the system components. These are the B-ration, the communications-computation ratio and the memory-processing ratio. These ratios are dimensionless with values greater than unity indicates the presence of a bottleneck. The methodology is illustrated and validated using a communication intensive linear solver algorithm (Gauss-Jordan elimination) which was implemented on a mesh connected distributed memory parallel computer (128 T800 Parystec SuperCluster).

Item Type: Report
Subjects: Q Science > QA Mathematics > QA76 Electronic computers. Computer science. Computer software
Divisions: Faculty of Science, Engineering and Medicine > Science > Computer Science
Library of Congress Subject Headings (LCSH): Parallel processing (Electronic computers)
Series Name: Department of Computer Science research report
Publisher: University of Warwick. Department of Computer Science
Official Date: 1995
Dates:
DateEvent
1995Completion
Number: Number 281
DOI: CS-RR-281
Institution: University of Warwick
Theses Department: Department of Computer Science
Status: Not Peer Reviewed
Publication Status: Unpublished
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