Skip to content Skip to navigation
University of Warwick
  • Study
  • |
  • Research
  • |
  • Business
  • |
  • Alumni
  • |
  • News
  • |
  • About

University of Warwick
Publications service & WRAP

Highlight your research

  • WRAP
    • Home
    • Search WRAP
    • Browse by Warwick Author
    • Browse WRAP by Year
    • Browse WRAP by Subject
    • Browse WRAP by Department
    • Browse WRAP by Funder
    • Browse Theses by Department
  • Publications Service
    • Home
    • Search Publications Service
    • Browse by Warwick Author
    • Browse Publications service by Year
    • Browse Publications service by Subject
    • Browse Publications service by Department
    • Browse Publications service by Funder
  • Help & Advice
University of Warwick

The Library

  • Login
  • Admin

Design and fabrication of silicon-on-silicon-carbide substrates and power devices for space applications

Tools
- Tools
+ Tools

Gammon, P. M., Chan, Chun Wa, Gity, F., Trajkovic, T., Kilchytska, V., Li, Fan, Pathirana, V., Camuso, G., Ben Ali, K., Flandre, D., Mawby, P. A. (Philip A.) and Gardner, J. W. (2017) Design and fabrication of silicon-on-silicon-carbide substrates and power devices for space applications. E3S Web of Conferences, 16 . 12003. doi:10.1051/e3sconf/20171612003

[img]
Preview
PDF
WRAP-design-fabrication-silicon-on-silicon-carbide-substrates-Gammon-2017.pdf - Published Version - Requires a PDF viewer.
Available under License Creative Commons Attribution 4.0.

Download (1436Kb) | Preview
Official URL: http://dx.doi.org/10.1051/e3sconf/20171612003

Request Changes to record.

Abstract

A new generation of power electronic semiconductor devices are being developed for the benefit of space and terrestrial harsh-environment applications. 200-600 V lateral transistors and diodes are being fabricated in a thin layer of silicon (Si) wafer bonded to silicon carbide (SiC). This novel silicon-on-silicon-carbide (Si/SiC) substrate solution promises to combine the benefits of silicon-on-insulator (SOI) technology (i.e device confinement, radiation tolerance, high and low temperature performance) with that of SiC (i.e. high thermal conductivity, radiation hardness, high temperature performance). Details of a process are given that produces thin films of silicon 1, 2 and 5 μm thick on semi-insulating 4H-SiC. Simulations of the hybrid Si/SiC substrate show that the high thermal conductivity of the SiC offers a junction-to-case temperature ca. 4× less that an equivalent SOI device; reducing the effects of self-heating, and allowing much greater power density. Extensive electrical simulations are used to optimise a 600 V laterally diffused metal-oxide-semiconductor field-effect transistor (LDMOSFET) implemented entirely within the silicon thin film, and highlight the differences between Si/SiC and SOI solutions.

Item Type: Journal Article
Subjects: T Technology > TA Engineering (General). Civil engineering (General)
Divisions: Faculty of Science, Engineering and Medicine > Engineering > Engineering
Library of Congress Subject Headings (LCSH): Silicon carbide -- Thermal properties, Semiconductors, Power electronics -- Design and construction, Astronautics -- Technological innovations
Journal or Publication Title: E3S Web of Conferences
Publisher: EDP Sciences
ISSN: 2267-1242
Official Date: 23 May 2017
Dates:
DateEvent
23 May 2017Published
23 May 2017Accepted
Volume: 16
Article Number: 12003
DOI: 10.1051/e3sconf/20171612003
Status: Peer Reviewed
Publication Status: Published
Description:

11th European Space Power Conference

Funder: Horizon 2020 (European Commission) (H2020), Royal Academy of Engineering (Great Britain), Engineering and Physical Sciences Research Council (EPSRC)
Grant number: EP/N00647X/1 (EPSRC)

Request changes or add full text files to a record

Repository staff actions (login required)

View Item View Item

Downloads

Downloads per month over past year

View more statistics

twitter

Email us: wrap@warwick.ac.uk
Contact Details
About Us