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Comparative study of RESURF Si/SiC LDMOSFETs for high-temperature applications using TCAD modeling

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Chan, Chun Wa, Li, Fan, Sánchez, Ana M., Mawby, P. A. (Philip A.) and Gammon, P. M. (2017) Comparative study of RESURF Si/SiC LDMOSFETs for high-temperature applications using TCAD modeling. IEEE Transactions on Electron Devices, 64 (9). pp. 3713-3718. doi:10.1109/TED.2017.2719898

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Official URL: http://dx.doi.org/10.1109/TED.2017.2719898

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Abstract

This paper analyses the effect of employing an Si on semi-insulating SiC (Si/SiC) device architecture for the implementation of 600-V LDMOSFETs using junction isolation and dielectric isolation reduced surface electric field technologies for high-temperature operations up to 300 °C. Simulations are carried out for two Si/SiC transistors designed with either PN or silicon-on-insulator (SOI) and their equivalent structures employing bulk-Si or SOI substrates. Through comparisons, it is shown that the Si/SiC devices have the potential to operate with an offstate leakage current as low as the SOI device. However, the low-side resistance of the SOI LDMOSFET is smaller in value and less sensitive to temperature, outperforming both Si/SiC devices. Conversely, under high-side configurations, the Si/SiC transistors have resistances lower than that of the SOI at high substrate bias, and invariable with substrate potential up to −200 V, which behaves similar to the bulkSi LDMOS at 300 K. Furthermore, the thermal advantage of the Si/SiC over other structures is demonstrated by using a rectangle power pulse setup in Technology Computer-Aided design simulations.

Item Type: Journal Article
Subjects: T Technology > TK Electrical engineering. Electronics Nuclear engineering
Divisions: Faculty of Science > Engineering
Faculty of Science > Physics
Library of Congress Subject Headings (LCSH): Metal oxide semiconductor field-effect transistors, Integrated circuits -- Effect of high temperatures on, Silicon carbide, Silicon-on-insulator technology, Semiconductors -- Materials
Journal or Publication Title: IEEE Transactions on Electron Devices
Publisher: IEEE
ISSN: 0018-9383
Official Date: 2017
Dates:
DateEvent
2017Published
22 June 2017Accepted
Volume: 64
Number: 9
Page Range: pp. 3713-3718
DOI: 10.1109/TED.2017.2719898
Status: Peer Reviewed
Publication Status: Published
Access rights to Published version: Open Access
Funder: Royal Academy of Engineering (Great Britain), Horizon 2020 (European Commission) (H2020), Engineering and Physical Sciences Research Council (EPSRC)
Grant number: EP/N00647X/1 (EPSRC)
RIOXX Funder/Project Grant:
Project/Grant IDRIOXX Funder NameFunder ID
UNSPECIFIEDRoyal Academy of Engineeringhttp://dx.doi.org/10.13039/501100000287
UNSPECIFIED[ERC] Horizon 2020 Framework Programmehttp://dx.doi.org/10.13039/100010661
EP/N00647X/1[EPSRC] Engineering and Physical Sciences Research Councilhttp://dx.doi.org/10.13039/501100000266

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