Chan, Chun Wa, Bonyadi, Yeganeh, Mawby, P. A. (Philip A.) and Gammon, P. M. (2016) Si/SiC substrates for the implementation of linear-doped power LDMOS studied with device simulation. Materials Science Forum, 858 . pp. 844-847. doi:10.4028/www.scientific.net/MSF.858.844

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Abstract

In this study, a 600 V LDMOSFET using a silicon-on-silicon carbide (Si/SiC) substrate is presented. An SOI counterpart is established with a linear-doped drift region the same as that of the Si/SiC transistor. Simulation results show that they perform similar off-state behaviours, both with a significant tunneling leakage emerging above 450 V at 300 K. In the on-state, the proposed structure has advantages over the SOI, namely lower resistance, higher saturation current and improved self-heating effect. Turn-off performance is also enhanced owing to substantial reduction of the drain-substrate capacitance. These are realised by an “IOS” (Insulator on Silicon) setup embedded in the Si/SiC structure.

Item Type:	Journal Article
Divisions:	Faculty of Science > Engineering
Journal or Publication Title:	Materials Science Forum
Publisher:	Trans Tech Publications Ltd.
ISSN:	1662-9752
Official Date:	May 2016
Dates:	Date Event May 2016 Published 4 January 2016 Accepted
Date of first compliant deposit:	13 September 2017
Volume:	858
Page Range:	pp. 844-847
DOI:	10.4028/www.scientific.net/MSF.858.844
Status:	Peer Reviewed
Publication Status:	Published
Funder:	Royal Academy of Engineering (Great Britain)

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