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Full parallel process for multidimensional wave digital filtering via multidimensional retiming technique
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UNSPECIFIED (2004) Full parallel process for multidimensional wave digital filtering via multidimensional retiming technique. In: IEEE International Symposium on Circuits and Systems, Vancouver, CANADA, MAY 23-26, 2004. Published in: 2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 3, PROCEEDINGS pp. 209-212. ISBN 0-7803-8251-X.
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Abstract
As an alternative approach to the numerical integration of PDEs representing physical systems, the MD-WDF technique has become of importance due to its attractive features such as massive parallelism and high accuracy inherent in nature. Speed-up efficiencies in terms of achieving fully parallel computing were studied for a 2D-WDF model of the linear transmission line using the chained MD retiming technique. To further explore parallel processing in MD-AMF models using the same pipelining technique, this paper presents the full parallelism for a 3D-WDF model of the linearized shallow water equations (SWEs), which is important in fluid dynamics. Experimental results show that the 3D-WDF model can achieve its full parallelism provided that at most seven parallel processors are each able to implement one multiplication and one addition in one time unit. These results can be extended to a non-linear SWEs, which encounters huge amount of data handling and specific non-linear optimization problems arising from system modelling.
Item Type: | Conference Item (UNSPECIFIED) | ||||
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Subjects: | Q Science > QA Mathematics > QA76 Electronic computers. Computer science. Computer software T Technology > TK Electrical engineering. Electronics Nuclear engineering |
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Journal or Publication Title: | 2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 3, PROCEEDINGS | ||||
Publisher: | IEEE | ||||
ISBN: | 0-7803-8251-X | ||||
Official Date: | 2004 | ||||
Dates: |
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Number of Pages: | 4 | ||||
Page Range: | pp. 209-212 | ||||
Publication Status: | Published | ||||
Title of Event: | IEEE International Symposium on Circuits and Systems | ||||
Location of Event: | Vancouver, CANADA | ||||
Date(s) of Event: | MAY 23-26, 2004 |
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