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Modeling the impact of the trench depth on the gate-drain capacitance in power MOSFETs
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Alatise, Olayiwola M., Parker-Allotey, Nii-Adotei, Jennings, M. R., Mawby, P. A. (Philip A.), Kennedy, Ian and Petkos, George (2011) Modeling the impact of the trench depth on the gate-drain capacitance in power MOSFETs. IEEE Electron Device Letters, Vol.32 (No.9). pp. 1269-1271. doi:10.1109/LED.2011.2159476 ISSN 0741-3106.
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WRAP_Alatise_IEEE_EDL_Switching_Losses_paper_FINAL.pdf - Accepted Version Download (530Kb) |
Official URL: http://dx.doi.org/10.1109/LED.2011.2159476
Abstract
Trench depth is important in low-voltage trench MOSFETs because it affects the switching losses through the gate-drain capacitance (C(GD)). The dependence of C(GD) on the trench depth is investigated by analytical modeling and experimental characterization. An analytical model that relates the trench depth, trench bottom oxide thickness, n(-) layer doping, and drain voltage (V(D)) to C(GD) is developed and validated by experimental measurements. Trench MOSFETs with thick bottom oxides have been fabricated with 1.3-, 1.5-, 1.7-, and 2-mu m deep trenches. CV measurements show that C(GD) is proportional to the trench depth at low V(D) and becomes increasingly independent of trench depth as V(D) is increased. The model is used to show that this is due to C(GD) being dominated by the oxide capacitance at low V(D) and the depletion capacitance at high V(D). The fact that the average thickness of the trench bottom oxide decreases as the trench depth increases (because of additional sidewall oxide overlapping the drain) means that the impact of the trench depth is the highest at low V(D), where the depletion capacitance is ineffective.
Item Type: | Journal Article | ||||
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Subjects: | T Technology > TK Electrical engineering. Electronics Nuclear engineering | ||||
Divisions: | Faculty of Science, Engineering and Medicine > Engineering > Engineering | ||||
Library of Congress Subject Headings (LCSH): | Metal oxide semiconductor field-effect transistors -- Mathematical models | ||||
Journal or Publication Title: | IEEE Electron Device Letters | ||||
Publisher: | IEEE | ||||
ISSN: | 0741-3106 | ||||
Official Date: | September 2011 | ||||
Dates: |
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Volume: | Vol.32 | ||||
Number: | No.9 | ||||
Number of Pages: | 3 | ||||
Page Range: | pp. 1269-1271 | ||||
DOI: | 10.1109/LED.2011.2159476 | ||||
Status: | Peer Reviewed | ||||
Publication Status: | Published | ||||
Access rights to Published version: | Restricted or Subscription Access | ||||
Date of first compliant deposit: | 18 December 2015 | ||||
Date of first compliant Open Access: | 18 December 2015 | ||||
Funder: | Advantage West Midlands (AWM), Birmingham Science City |
Data sourced from Thomson Reuters' Web of Knowledge
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