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High-performance 40nm gate length InSb p-channel compressively strained quantum well field effect transistors for low-power (VCC=0.5V) logic applications
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(2008) High-performance 40nm gate length InSb p-channel compressively strained quantum well field effect transistors for low-power (VCC=0.5V) logic applications. In: IEEE International Electron Devices Meeting, 2008. IEDM 2008., San Francisco, CA, 15-17 Dec 2008. Published in: IEEE International Electron Devices Meeting, 2008. IEDM 2008. ISBN 9781424423774. doi:10.1109/IEDM.2008.4796798
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Official URL: http://dx.doi.org/10.1109/IEDM.2008.4796798
Abstract
This paper describes for the first time, a high-speed and low-power III-V p-channel QWFET using a compressively strained InSb QW structure. The InSb p-channel QW device structure, grown using solid source MBE, demonstrates a high hole mobility of 1,230 cm2/V-s. The shortest 40 nm gate length (LG) transistors achieve peak transconductance (Gm) of 510 muS/mum and cut-off frequency (fT) of 140 GHz at supply voltage of 0.5V. These represent the highest Gm and fT ever reported for III-V p-channel FETs. In addition, effective hole velocity of this device has been measured and compared to that of the standard strained Si p-channel MOSFET.
Item Type: | Conference Item (Paper) | ||||
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Divisions: | Faculty of Science, Engineering and Medicine > Engineering > Engineering | ||||
Journal or Publication Title: | IEEE International Electron Devices Meeting, 2008. IEDM 2008. | ||||
ISBN: | 9781424423774 | ||||
Book Title: | 2008 IEEE International Electron Devices Meeting | ||||
Official Date: | 2008 | ||||
Dates: |
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DOI: | 10.1109/IEDM.2008.4796798 | ||||
Status: | Not Peer Reviewed | ||||
Publication Status: | Published | ||||
Conference Paper Type: | Paper | ||||
Title of Event: | IEEE International Electron Devices Meeting, 2008. IEDM 2008. | ||||
Type of Event: | Other | ||||
Location of Event: | San Francisco, CA | ||||
Date(s) of Event: | 15-17 Dec 2008 |
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