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Efficient integer frequency offset estimation architecture for enhanced OFDM synchronization
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Pham, Thinh H., Fahmy, Suhaib A. and McLoughlin, Ian V. (2016) Efficient integer frequency offset estimation architecture for enhanced OFDM synchronization. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 24 (4). pp. 1412-1420. doi:10.1109/TVLSI.2015.2453207 ISSN 1063-8210.
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Official URL: http://ieeexplore.ieee.org/xpl/articleDetails.jsp?...
Abstract
In orthogonal frequency-division multiplexing (OFDM) systems, integer frequency offset (IFO) causes a circular shift of the sub-carrier indices in the frequency domain. IFO can be mitigated through strict RF front-end design, which tends to be expensive, or by strictly limiting mobility and channel agility, which constrains operating scenarios. IFO is therefore often estimated and removed at baseband, allowing implementations to benefit from relaxed RF front-end specifications and be tolerant to both Doppler shift and multi-standard channel selection. This paper proposes a novel architecture for IFO estimation which achieves reduced power consumption and lower computational cost than contemporary methods, while achieving excellent estimation performance, close to theoretically achievable bounds. A pilot subsampling technique enables four-fold resource sharing to reduce computational cost, while multiplierless computation yields further power reduction. Performance exceeds that of conventional techniques, while being much more efficient. When implemented on FPGA for IEEE 802.16-2009, dynamic power reductions of 78% are achieved. The architecture and method is applicable to other OFDM standards including IEEE 802.11 and IEEE 802.22.
Item Type: | Journal Article | ||||||
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Subjects: | Q Science > QA Mathematics > QA76 Electronic computers. Computer science. Computer software T Technology > TK Electrical engineering. Electronics Nuclear engineering |
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Divisions: | Faculty of Science, Engineering and Medicine > Engineering > Engineering | ||||||
Library of Congress Subject Headings (LCSH): | Orthogonal frequency division multiplexing, Signal processing -- Digital techniques, Field programmable gate arrays, Computer-aided design, Programmable array logic | ||||||
Journal or Publication Title: | IEEE Transactions on Very Large Scale Integration (VLSI) Systems | ||||||
Publisher: | IEEE | ||||||
ISSN: | 1063-8210 | ||||||
Official Date: | April 2016 | ||||||
Dates: |
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Volume: | 24 | ||||||
Number: | 4 | ||||||
Number of Pages: | 9 | ||||||
Page Range: | pp. 1412-1420 | ||||||
DOI: | 10.1109/TVLSI.2015.2453207 | ||||||
Status: | Peer Reviewed | ||||||
Publication Status: | Published | ||||||
Access rights to Published version: | Restricted or Subscription Access | ||||||
Date of first compliant deposit: | 31 March 2016 | ||||||
Date of first compliant Open Access: | 1 April 2016 | ||||||
Adapted As: |
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