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Reliability assessment and modelling of power electronic devices for automotive application and design.
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Bonyadi, Roozbeh (2016) Reliability assessment and modelling of power electronic devices for automotive application and design. PhD thesis, University of Warwick.
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Official URL: http://webcat.warwick.ac.uk/record=b3071738~S15
Abstract
The emergence of the hybrid electric vehicle and electric vehicles (HEV and EV) requires the reliability assessment of power electronic devices used in the inverters. This includes the electro-thermal reliability of bipolar devices such as IGBTs and PiN diodes and more recently, the SiC MOSFETs since the SiC technology is not as mature as their bipolar counterparts. This research, in its own capacity, through the use of accurate compact models, investigates the switching performance and characteristics of silicon IGBTs, PiN diodes and SiC MOSFETs. The need for higher power densities and fast device switching causes certain concerns in the performance and terminal characteristics of the converter.
SiC MOSFET is a potential power device for implementing EV drivetrain inverters. One of the major advantages of SiC MOSFET is the possibility of using their body diodes for reverse current conduction, thereby obviating the need for lossy silicon PiN diodes. The primary goal of using SiC MOSFETs is to enable high frequency switching since the significantly lower switching losses coupled with the high dI/dt and dV/dt can increase the power density. This research has investigated and modelled the use of the SiC body diode for current commutation under high dV/dt conditions. Since the body diode is not designed to operate under such conditions, the electrothermal robustness of SiC body diode is investigated by simulating parasitic BJT latch-up that results from hard current commutation under high dV/dt. In a power MOSFET, high switching rates coupled with the drain-body capacitance brings about a displacement current passing through the resistive path of the P-body in the MOSFET structure which creates a voltage at the base of the parasitic BJT within the device. This BJT latch-up under certain thermal conditions is capable of destruction of the device.
Another problem induced by high switching speed is that of the electrical coupling between complementing devices in the same leg of the inverter which is known as cross-talk or parasitic gate turn-on. In this research, the unintentional switching of IGBTs and the resulting short circuit current surge passing through the devices as a consequence of reducing the dead-time as well as increasing the switching rate is investigated and modelled. This is due to the discharge of the Miller capacitance which feeds back a current into the gate of the transistor. The result is that both transistors are switching on in the same phase leg.
The other problem which is addressed in this research is modelling the switching transients of parallel connected IGBTs for the purpose of delivering high current conduction capability. The electrothermal energy balancing between the parallel connected IGBTs is important as the electrothermal variation between the parallel connected devices can cause temperature imbalance, thereby, accelerating the degradation of the power module. This research investigates the variations in the electrical time constants and the thermal time constants between the parallel connected devices and models the switching behaviours.
Lastly, this research has focused on designing and fabricating power modules suitable for EV application and has tried to address methods to improve the electrothermal performance of the device and has investigated the impact of parasitic inductance of the layout on the electrothermal performance of the power module.
Item Type: | Thesis (PhD) | ||||
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Subjects: | T Technology > TK Electrical engineering. Electronics Nuclear engineering | ||||
Library of Congress Subject Headings (LCSH): | Electric vehicles -- Design and construction, Power electronics -- Design and construction, Silicon carbide -- Electric properties, Insulated gate bipolar transistors, PIN diodes | ||||
Official Date: | September 2016 | ||||
Dates: |
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Institution: | University of Warwick | ||||
Theses Department: | School of Engineering | ||||
Thesis Type: | PhD | ||||
Publication Status: | Unpublished | ||||
Supervisor(s)/Advisor: | Mawby, P. A. (Philip A.) ; Alatise, Olayiwola | ||||
Format of File: | |||||
Extent: | xxvi, 321 leaves : illustrations, charts | ||||
Language: | eng |
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